Research Projects

• Apr. 2023
• Apr. 2021, Mar. 2026, Principal investigator
• Oct. 2019, Mar. 2025, Coinvestigator not use grants, Competitive research funding, j_global

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Gunma University, Apr. 2019, Mar. 2024, Coinvestigator, Competitive research funding, 19K11387, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Gunma University, Apr. 2020, Mar. 2023, Coinvestigator, Competitive research funding, 20K03063, kaken

  対象リソースIRI
• Demonstration of wiring-driven integrated circuit system design theory utilizing multi-valued data transmission, Yuminaka Yasushi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Gunma University, Apr. 2018, Mar. 2022, Principal investigator, In order to realize data communication in VLSI systems and data centers, etc., where higher speeds and capacities are required, this research examined the construction of a new concept of high-speed data transmission system design theory utilizing devices with multi-level coding, which is used in the next-generation high-speed data communication standards. In particular, "Waveform equalization techniques specific to 4-level signals" and "Eye-pattern evaluation of received signals" were studied. As research results, we developed elemental technologies such as digital-rich waveform equalization circuits, coding, and pre-distortion as waveform shaping technologies for PAM-4 data transmission, enabling evaluation of each technology on actual transmission lines and making it effective for testing multi-valued data transmission systems., Competitive research funding, 18H01488, kaken

  対象リソースIRI
• Real-time visualization of shear wave propagation and its application to tissue characterization, Yamakoshi Yoshiki, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Gunma University, Apr. 2016, Mar. 2019, Coinvestigator, Since it is expected that the shear elasticity is useful for diagnosis of cancer, imaging methods (elastography) has been studied in order to observe shear elastic properties of soft tissues. In this research, we used a real-time visualization method of shear waves (CD SWI method) in order to improve both the quantitativeness and spatial resolution of shear wave images, such as shear wave velocity map, shear wave propagation direction map and shear wave propagation map. We also developed high-precision, high-resolution measurement methods for measurement of shear wave velocity. We applied this method to visualization of breast cancer and quantitative evaluation of skeletal muscle and the effectiveness of this method was shown., Competitive research funding, 16H04373, url

  対象リソースIRI
• High-speed data transmission technology system based on coding and signal processing and its application, Yuminaka Yasushi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Gunma University, Apr. 2015, Mar. 2019, Principal investigator, There is growing demand for ultra-high-speed serial electric interconnects for data centers and throughout the IT infrastructure. However, in such high-speed serial links, channel distortion which arises from the limited channel bandwidth, and noise significantly restricts the total VLSI system performance. This research proposes network-centric VLSI system design based on sophisticated coding and signal processing techniques to overcome the problems. In particular, we consider the high-speed data transmission techniques based on PAM-4 signaling that is adopted in the next-generation high-speed signal transmission standard. The main research results are (1) consideration and demonstration of waveform equalization algorithm for PAM-4 data transmission and (2) evaluation of signal integrity by statistical eye pattern measurement of PAM-4 signaling., Competitive research funding, 15H02675, url

  対象リソースIRI
• Network-centric LSIs based on high-speed data transmission assisted by coding and signal processing techniques, YUMINAKA Yasushi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Gunma University, Apr. 2012, Mar. 2015, Principal investigator, In advanced low-voltage high-speed VLSI systems, channel bandwidth limitation becomes a crucial problem as the required data rate communication increases, as high-frequency channel loss significantly degrades transmission performance. In this research, we have proposed network-centric VLSI systems based on following techniques to overcome the issues; (1)Efficient coding techniques for high-speed data transmission based on spectral shaping techniques, (2) Co-simulation environment to evaluate high-speed serial links using measured transmission characteristics., 24300014, url

  対象リソースIRI
• Interconnect-centric LSI systems based on high-speed data transmission assisted by time-domain information processing, YUMINAKA Yasushi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Gunma University, 2009, 2011, Principal investigator, The performance of recent high-speed VLSI systems is significantly limited by the interconnection bandwidth inside/between chips relative to individual transistor performance. The attenuation or deterioration of signals, arises from physical phenomena in transmission lines, limits achievable data rates and transmission distance. In this research, we have proposed following techniques to overcome the issues. (1)A new type of transmitter pre-emphasis technique based on pulse-width modulation (PWM) of a digitally coded signal. (2) An Efficient data coding scheme suited to channel characteristics and its application to wireless interconnection for 3D ICs., 21500051, url

  対象リソースIRI
• New-paradigm of LSI systems based on efficient data transmission using communication and signal processing techniques, YUMINAKA Yasushi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Gunma University, 2007, 2008, Principal investigator, 19500038, url

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B), Grant-in-Aid for Young Scientists (B), Gunma University, 2005, 2006, Principal investigator, 17700048, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B), Grant-in-Aid for Young Scientists (B), Gunma University, 2003, 2004, Principal investigator, 15700042, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B), Grant-in-Aid for Young Scientists (B), Gunma University, 2001, 2002, Principal investigator, 13780197, kaken

  対象リソースIRI
• A Study on Beyond-Binary Computing, HIGUCHI Tatsuo; YUMINAKA Yasushi; AOKI Takafumi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Tohoku University, 1999, 2001, The present-day VLSI systems are designed on the basis of binary (radix-2) arithmetic algorithms combined with binary logic devices. As the VLSI technology scales down to deep sub-micron geometry, performance bottlenecks caused by increased wiring complexity and delay are becoming significantly severe. This research project is to investigate a possibility of overcoming the performance bottlenecks by employing a new computing paradigm called "Beyond-Binary Computing". Listed below are major results of this project: 1. High-speed arithmetic algorithms using non-binary redundant number systems were developed and their performances were confirmed through experimental chip fabrications. Examples include (i) a radix-4 parallel divider chip, (ii) a radix-2-4-8 CORDIC processor chip, (iii) a configurable datapath chip using SW arithmetic, and (iv) a real/complex reconfigurable datapath chip using redundant complex arithmetic. Optimizing number representation for target applications makes possible drastic reduction in computation time, power consumption and wiring complexity. Impacts of multiple-valued logic IC technology combined with redundant arithmetic algorithms were demonstrated through the design of field-programmable digital filter ICs. Also, new CAD techniques for designing beyond-binary circuits and systems were proposed. 2. A prototype of set-valued logic system, which uses pseudo-random sequences as information carriers, was designed and fabricated. The underlying principle of the fabricated system was extended to intra-chip CDMA communication techniques, which will be useful for implementing highly parallel computing architectures with reduced wiring complexity. 3. Techniques for computer-based simulation and analysis for enzyme transistor circuits were developed. These techniques were used to demonstrate some applications of molecular computing, including optimal path planning and image processing. The principle of wire-free circuit integration using artificial catalyst devices, such as enzyme transistors, was confirmed experimentally., 11480058, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Encouragement of Young Scientists (A), Grant-in-Aid for Encouragement of Young Scientists (A), Gunma University, 1999, 2000, Principal investigator, 11780193, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Encouragement of Young Scientists (A), Grant-in-Aid for Encouragement of Young Scientists (A), Gunma University, 1997, 1998, Principal investigator, 09780239, kaken

  対象リソースIRI
• A Study of Highly Parallel Computing Based on Set-Valued Logic, HIGUCHI Tatsuo; YUMINAKA Yasushi; AOKI Takafumi, Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B), Grant-in-Aid for Scientific Research (B), Tohoku University, 1996, 1998, Coinvestigator, In this project, we investigated a potential of "multiplex computing architectures" (listed below) to address interconnection problems in advanced VLSI systems. 1. [Multiple-Valued Logic System] New arithmetic computing architectures using non-binary/high-radix number systems, such as high-radix dividers, a high-radix CORDIC processor, a redundant complex multiplier and reconfigurable arithmetic datapaths, were developed to demonstrate advantages of improving processing latency, circuit complexity, gate count and power consumption. Also, the impact of multiple-valued integrated circuit technology was investigated through experimental fabrication. 2. [FDMA/CDMA-Based Computing Architectures] Set-valued logic architectures based on FDMA (Frequency-Division Multiple Access) and CDMA (Code-Division Multiple Access) were investigated. A test chip for ODMA-based set-valued logic was fabricated using current-mode CMOS to demonstrate significant reduction in wiring complexity. Also, flexible control of bit error rate in intra-chip data transmission is possible by controlling the length of M-sequence codes and the degree of multiplexing. This idea was also extended to the design of wire-efficient neural network architectures. 3. [Multiwavelength Optical Interconnection] A multiwavelength optical interconnection network for MCM-based parallel processing was proposed and its key device the "wavelength detector" was developed. It was shown that the wavelength detector can discriminate 8 16 wavelengths multiplexed within a waveguide and that this degree of multiplexing makes possible the reduction of network area complexity by the factor of 1/64 - 1/256 in comparison with a single wavelength implementation. 4. [Molecular Computing System] A molecular computing architecture using "enzyme transistors" was investigated. The basic function of an enzyme transistor was confirmed experimentally., 08458058, kaken

  対象リソースIRI
• Japan Society for the Promotion of Science, Grants-in-Aid for Scientific Research Grant-in-Aid for Encouragement of Young Scientists (A), Grant-in-Aid for Encouragement of Young Scientists (A), Gunma University, 1996, 1996, Principal investigator, 08780239, kaken

  対象リソースIRI
• Dec. 2023, Mar. 2025, Coinvestigator
• Apr. 2023, Mar. 2024